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LT3571 1 3571fa typical application description 75v dc/dc converter for apd bias the lt ? 3571 is a current mode step-up dc/dc converter designed to bias avalanche photodiodes (apds) in optical receivers with an output voltage up to 75v. the LT3571 features a high side ? xed voltage drop apd current moni- tor with better than 10% relative accuracy over the entire temperature range. the integrated power switch, schottky diode and apd current monitor allow a small solution footprint and low solution cost. it combines a traditional voltage loop and a unique current loop to operate as a constant-current source or constant-voltage source. the inductor-based topology ensures an input free from switching noise. the integrated high side current monitor produces a current proportional to the apd current with better than 10% relative accuracy over four decades of dynamic range in the input range of 250na to 2.5ma. this current can be used as a reference to provide a digitally programmed output voltage via the ctrl pin. the LT3571 is available in the tiny footprint (3mm 3mm) 16-lead qfn package. l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 45v low noise apd bias power supply features applications n high apd voltage: up to 70v n integrated schottky diode n 75v, 370ma internal switch n high side fixed voltage drop apd current monitor n adjustable frequency: 250khz to 2mhz n frequency synchronization n wide v in range: 2.7v to 20v n constant-voltage and constant-current regulation n programmable current limit protection n surface mount components n low shutdown current <1a n internal soft-start n internal compensation n ctrl pin allows output adjustment with no polarity inversion n 3mm 3mm 16-lead qfn package n apd bias n pin diode bias n optical receivers and modules n fiber optic network equipment apd bias ripple 1f monin v ref r t shdn ctrl gnd sync v out fb v in sw LT3571 mon apd off on v in 5v 20.5k 49.9 45v 12.1k 1mhz 3571 ta01a 0.1f 10k 10nf 50v 0.1f 10h 1m 20 10nf i apd = 1ma 500ns/div 3571 ta01b 500v/div
LT3571 2 3571fa pin configuration absolute maximum ratings input voltage (v in ), shdn ........................................20v v out , monin, apd ....................................................75v mon ..........................................................................12v sw ............................................................................75v ctrl, fb, sync ..........................................................5v r t , v ref ...................................................................1.5v operating ambient temperature range (note 2) .............................................C40c to 125c operating junction temperature (note 2) .............................................C40c to 125c storage temperature range ...................C65c to 150c (note 1) 16 17 15 14 13 5 6 7 8 top view ud package 16-lead (3mm s 3mm) plastic qfn 9 10 11 12 4 3 2 1 nc apd monin v out shdn v in gnd r t mon fb ctrl v ref sw sw gnd sync t jmax = 125c, ja = 68c/w, jc = 4.2c/w (note 2) exposed pad (pin 17) is gnd, must be soldered to pcb parameter conditions min typ max units minimum operating voltage 2.7 v maximum operating voltage 20 v supply current v fb = 1.3v, not switching v shdn = 0v 1.7 0.1 2.2 0.5 ma a feedback voltage v ctrl = 1.25v, v out = v monin l 0.985 0.97 1 1.015 1.03 v v feedback line regulation 2.7v < v in < 20v 0.03 0.07 %/v current sense voltage (v out C v monin )v out = 30v l 185 200 215 mv fb pin bias current v fb = 0v l 60 100 na v ref pin voltage i ref = C100a l 1.200 1.222 1.240 v v ref pin line regulation 2.7v < v in < 20v 0.03 0.07 %v r t voltage 1v sync resistance to gnd v sync = 2v 45 k sync input low 0.4 v sync input high 1.5 v order information lead free finish tape and reel part marking* package description temperature range LT3571eud#pbf LT3571eud#trpbf ldtn 16-lead (3mm 3mm) plastic qfn C40c to 125c LT3571iud#pbf LT3571iud#trpbf ldtn 16-lead (3mm 3mm) plastic qfn C40c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c, v in = 3v, v shdn = 3v, unless otherwise noted.
LT3571 3 3571fa electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c, v in = 3v, v shdn = 3v, unless otherwise noted. parameter conditions min typ max units switching frequency r t = 12.1k r t = 4.22k r t = 56.2k l 0.85 1.7 210 1 2 250 1.15 2.3 280 mhz mhz khz maximum duty cycle r t = 56.2k (250khz) sync = 300khz clock signal, r t = 56.2k r t = 12.1k (1mhz) r t = 4.22k (2mhz) l 95 92 85 75 97 96 90 80 % % % % switch current limit 370 470 570 ma switch v cesat i sw = 200ma 240 mv switch leakage current v sw = 75v 2 a schottky forward voltage i schottky = 200ma 850 mv schottky reverse leakage v out C v sw = 75v 5 a shdn voltage high 1.5 v shdn voltage low 0.4 v shdn pin bias current 50 65 a ctrl to fb offset v ctrl = 0.5v l C5 C10 5 5 15 20 mv mv ctrl input bias current current out of pin, v ctrl = 0.5v 20 100 na apd current monitor gain 250na i apd < 10a, 10v < v monin < 75v 10a i apd 2.5ma, 20v < v monin < 75v l l 0.185 0.194 0.20 0.20 0.215 0.206 monitor output voltage clamp 11.5 v apd monitor voltage drop v monin C v apd, i apd = 1ma l 4.8 5 5.2 v monin pin current limit v monin = 40v, v apd = 0v 30 ma note 2: the LT3571e is guaranteed to meet speci? ed performance from 0c to 125c junction temperature. speci? cations over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the LT3571i is guaranteed to meet performance speci? cations over the C40c to 125c operating junction temperature range.
LT3571 4 3571fa typical performance characteristics schottky forward drop oscillator frequency vs r t oscillator frequency vs temperature fb pin voltage vs temperature v ref voltage vs temperature v out C v monin threshold vs v out switch current limit vs duty cycle switch current limit vs temperature switch saturation voltage (v cesat ) t a = 25c, unless otherwise speci? ed. duty cycle (%) 0 current limit (ma) 40 80 20 60 100 3571 g01 250 300 350 400 450 500 temperature (c) C50 current limit (ma) 0 50 75 C25 25 100 125 3571 g02 250 300 350 400 450 500 i sw (ma) v cesat (mv) 3571 g03 0 100 200 300 400 500 0 350 100 200 50 150 250 300 400 schottky forward current (ma) schottky forward drop (mv) 3571 g04 0 350 100 200 50 150 250 300 400 800 850 900 750 700 650 600 950 temperature (c) C50 oscillator frequency (khz) 0 50 75 C25 25 100 125 3571 g06 900 950 1000 1050 1100 r t = 12.1k temperature (c) C50 fb pin threshold (v) 0 50 75 C25 25 100 125 3571 g07 0.98 0.99 1.00 1.01 1.02 temperature (c) C50 v ref (mv) 0 50 75 C25 25 100 125 3571 g08 1.210 1.215 1.220 1.225 1.230 1.235 v out (v) 10 v out C v monin threshold (mv) 30 40 50 20 60 80 70 3571 g09 195 197 199 201 203 205 r t (k) 0 100 oscillator frequency (khz) 1000 10000 10 60 20 30 40 3571 g05 50
LT3571 5 3571fa typical performance characteristics current monitor accuracy vs temperature v monin - v apd vs apd current v monin C v apd vs temperature v out C v monin threshold vs temperature current monitor output vs v monin current monitor accuracy t a = 25c, unless otherwise speci? ed. temperature (c) C50 v out C v monin threshold (mv) 0 50 75 C25 25 100 125 3571 g10 194 196 198 200 202 206 204 v monin = 50v v monin (v) 10 18 i mon (a) 20 20 30 50 40 60 70 22 19 21 80 3571 g11 i apd = 100a input current (a) 0.1 C4 error (%) C2 0 2 1 10 1000 100 4 C3 C1 1 3 10000 3571 g12 v monin = 75v temperature (c) C50 C6 error (%) C5 C3 C2 C1 2 1 0 50 75 C4 0 C25 25 100 125 3571 g13 v monin = 75v 250na 10a 2.5ma apd current (a) 0.1 4.80 v monin -v apd (v) 4.85 4.90 4.95 5.10 5.05 5.00 10 1000 3571 g14 v monin = 75v temperature (c) C 50 125 100 75 50 25 0 C25 4.9 v monin -v apd (v) 4.95 5 5.1 5.05 3571 g15 v monin = 75v i apd = 1ma fb vs ctrl ctrl (v) 0 1.2 1 0.8 0.6 0.4 0.2 0 fb (v) 0.2 0.4 0.6 0.8 1 1.2 3571 g16 50ns/div input response 3571 g18 i apd = 1ma t fd < 100ns i apd = 10a current monitor transient response (falling edge) current monitor transient response (rising edge) 50ns/div input response 3571 g17 i apd = 10a t rd < 100ns i apd = 1ma
LT3571 6 3571fa pin functions nc (pin 1): no connect. apd (pin 2): apd cathode pin. connect apd cathode to this pin. monin (pin 3): current monitor power supply pin. an external lowpass ? lter can be included here to further reduce supply voltage ripple. this pin also serves as the inverting input of the current sense ampli? er. put a sense resistor between the monin pin and the v out pin to set the boost converter output current limit as 200mv/r sense . connect the monin pin directly to the v out pin if the output current limit function is not used. v out (pin 4): boost output pin. put a capacitor between this pin and gnd plane. minimize the length of the trace to the capacitor. also serves as the noninverting input of the current sense ampli? er. sw (pin 5, 6): switch pin. minimize the trace length on this pin to reduce emi. gnd (pin 7, 10): ground. pins connected internally. for best performance, connect both pins to board ground. sync (pin 8): frequency synchronization pin. connect an external clock signal here. r t resistor should be chosen to program a switching frequency 20% slower than the sync pulse frequency. synchronization (switch turn-on) occurs a ? xed delay after the rising edge of sync. tie the sync pin to ground if this feature is not used. r t (pin 9): switching frequency pin. set switching fre- quency using a resistor to gnd (see typical performance characteristics for values). for sync function, choose the resistor to program a frequency 20% slower than the sync pulse frequency. do not leave this pin open. v in (pin 11): input supply pin. this pin must be locally bypassed. shdn (pin 12): shutdown pin. tie to 1.5v or higher to enable device; 0.4v or less to disable device. also functions as soft-start. use rc ? lter as shown in figure 1. v ref (pin 13): reference output pin. this pin can supply up to 100a. do not over drive this pin. bypass with a 10nf or larger capacitor. ctrl (pin 14): internal reference override pin. the ctrl pin allows the fb voltage to be externally adjusted between 0v and 1v to adjust the output voltage. tie this pin higher than 1.2v to use the internal reference of 1v. fb (pin 15): feedback pin. connect to output resistor divider tap. mon (pin 16): current monitor output pin. sources a current equal to 20% of the apd current and converts to a reference voltage through an external resistor. exposed pad (pin 17): ground. the exposed pad must be soldered to the pcb.
LT3571 7 3571fa block diagram C + + + + mon 1v 1v v out a3 a2 C + C + a4 C + 1v 3571 f01 a6 main switch driver eamp pwm comparator q1 main switch s rq monin 7, 10 gnd apd fb fb c3 r4 r5 ctrl c c r c sync r t v in freq adjust a5 v ref ramp generator 2mhz to 250khz oscillator q2 c2 C + shdn r s , c s optional soft-start components r3 v in a1 C + x5 apd current mirror soft-start 1.22v reference 8 15 14 16 2 3 4 5, 6 sw 13 9 11 12 l1 r1 fb r2 c pl c1 c in r sense d1 external control block c s r s on off figure 1. block diagram
LT3571 8 3571fa the LT3571 boost converter uses a constant-frequency current mode control scheme to provide excellent line and load regulation. operation can be best understood by referring to the block diagram in figure 1. at the start of each oscillator cycle, the sr latch is set, which turns on the q1 power switch. a voltage proportional to the switch current is added to a stabilizing ramp and the resulting sum is fed into the positive terminal of the pwm comparator, a4. when this voltage exceeds the level at the negative input of a4, the sr latch is reset, turning off the power switch. the level at the negative input of a4 is set by the error ampli? er a3. a3 has two inputs, one from the voltage feedback loop and the other one from the current loop. whichever feedback input is lower takes precedence and forces the converter into either constant-current or constant-voltage mode. the LT3571 is designed to transition cleanly between these two modes of operation. the current sense ampli? er senses the voltage across r sense and provides a pre-gain to ampli? er a1. the output of a1 is simply an ampli? ed version of the difference between the voltage across r sense and 200mv. in this manner, the error ampli? er sets the correct peak switch current level to regulate through r sense . the fb voltage loop is implemented by the ampli? er a2. when the voltage loop dominates, the error ampli? er regulates the fb pin to the lower of 1v, or externally provided ctrl voltage (constant-voltage mode), and sets the correct peak current level to keep the output in regulation. the LT3571 has an integrated high side apd current monitor with a 5:1 ratio. the voltage drop across the monin pin and apd pin is ? xed at 5v. the monin pin can accept a supply voltage up to 75v, which is suitable for apd photodiode applications. the mon pin has an open-circuit protection feature and is internally clamped to 11.5v. if an apd is tied to the apd pin, the current will be mir- rored to the mon pin and converted to a voltage signal by the resistor r4. this voltage signal can be used to drive an external control block to adjust the apd voltage by adjusting the feedback threshold of eamp a2 through the ctrl input. operation
LT3571 9 3571fa switching frequency there are two methods to set the switching frequency of the LT3571. both methods require a resistor connected at the r t pin. do not leave the r t pin open. also, do not load this pin with a capacitor. a resistor must always be connected for proper operation. one way to set the frequency is simply connecting an external resistor between the r t pin and gnd. see table 1 or the oscillator frequency vs r t graph in the typical performance characteristics for resistor values and corresponding switching frequencies. the other way is to make the LT3571 synchronize with an external clock via the sync pin. for proper operation, a resistor should be connected at the r t pin and able to generate a switching frequency 20% lower than the external clock when the external clock is absent. table 1. switching frequency vs r t switching frequency (khz) r t (k) 250 56.2 500 26.1 1000 12.1 1500 6.81 2000 4.22 2500 2.67 inrush current the LT3571 has a built-in schottky diode for the boost converter. when supply voltage is applied to the v in pin, the voltage difference between v in and v out generates inrush current ? owing from input through the inductor and the schottky diode (d1 in the block diagram), to charge the output capacitor. the selection of inductor and capacitor value should ensure the peak of the inrush current to below 1a. in addition, the LT3571 turn-on should be delayed until the inrush current is less than the maximum current limit. the peak inrush current can be estimated as follows: i p = v in ? 0.9 l c ?1 ? exp ? 2 l c ?1 ? ? ? ? ? ? ? ? ? ? where l is the inductance, and c is the output capacitance. table 2 gives inrush peak currents for some component selections . table 2. inrush peak current v in (v) l (h) c (f) i p (a) 5 10 1 0.81 5 22 1 0.63 setting output voltage the LT3571 is equipped with both an internal 1v reference and an auxiliary reference input (the ctrl pin). this feature allows users to select between using the built-in reference and supplying an external reference voltage. the voltage at the ctrl pin can be adjusted while the chip is operating, to alter the output voltage of LT3571 for purposes such as apds bias voltage adjustment. to use the internal 1v reference, the ctrl pin should be held higher than 1.2v, which can be done by tying it to v ref . when the ctrl pin is between 0v and 1v, the LT3571 will regulate the output such that the fb pin voltage is equal to the ctrl pin voltage. to set the output voltage, select the values of r1 and r2 (see figure 2) according to the following equation: r1 = r2 v monin v1 ?1 ? ? ? ? ? ? where v1 = 1v if the internal reference is used, or v1 = ctrl if ctrl is between 0v and 1v. r2 can be selected to load the output to maintain a constant switching frequency when the apd load is very low. preventing entry into pulse-skipping mode is an important consideration for post ? ltering the regulator output. figure 2. output voltage feedback connection applications information monin ctrl r1 3 15 14 3571 f02 fb LT3571 r2
LT3571 10 3571fa applications information inductor selection the inductors used with the LT3571 should have a saturation current rating of 0.4a, or greater. if the device is used in an application where the input supply will be hot-plugged, the saturation current rating should be equal to, or greater than, the peak inrush current. for best loop stability, the inductor value selected should provide a ripple current of 80ma or more. for a given v in and v out , the inductor value to use in continuous conduction mode (ccm) is estimated by the formula: l = d?v in ? ?80ma where: d = v out + 1? v in v out + 1 and f is the switching frequency. to achieve low output voltage ripple, a small value inductor should be selected to force the LT3571 to operate in discontinuous conduction mode (dcm). the inequality is true when the LT3571 is operating in discontinuous conduction mode. l < d?v in ? ?i limit where i limit is the switch current limit. operating in dcm reduces the maximum load current and the conversion ef? ciency. capacitor selection low esr capacitors should be used at the output to minimize the output voltage ripple. use only x5r and x7r types, because they retain their capacitance over wider voltage and temperature ranges than other types. high output voltages typically require less capacitance for loop stability. typically, use a 1f capacitor for output voltage less than 25v, and a 0.22f capacitor for output voltage beyond 25v. place the output capacitor as close as possible to the v out lead and to the gnd of the ic. either ceramic or solid tantalum capacitors may be used for the input decoupling capacitor, which should be placed as close as possible to the LT3571. a 1f capacitor is suf? cient for most applications. phase lead capacitor a small value capacitor (i.e., 10pf to 22pf) can be added in parallel with the resistor between the output and the fb pin to reduce output perturbation due to a load step and to improve transient response. this phase lead capacitor introduces a pole-zero pair to the feedback that boosts the phase margin near the crossover frequency. the apd is very sensitive to a noisy bias supply. to lowpass ? lter noise from the internal reference and error ampli? er, a 0.1f phase lead capacitor can be used. the corner frequency of the noise ? lter is r1 ? c pl . apd current monitor the power supply switching noise associated with a switching power supply can interfere with the photodiode dc measurement. to suppress this noise, a 0.1f capacitor is recommended at the apd pin. an additional series resistor is necessary to ensure enough high frequency compensation at the apd pin over the full operating range of the LT3571, as shown in figure 1. an additional output lowpass ? lter, a 10k resistor and a 10nf capacitor in parallel at mon pin can further reduce the power supply noise, and other wide band noise, which might limit the measurement accuracy of low current levels. for applications requiring fast current monitor response time, an rc lowpass ? lter at the monin pin is used to replace the 0.1f capacitor at the apd pin, as illustrated in figure 3. figure 3. rc filter at monin pin monin c filt 3571 f03 v out LT3571 apd c1 r sense
LT3571 11 3571fa monin mon apd pwm 0.5pf 3571 f04 LT3571 0.1f 4.99k 1k pmbt3904 Cv hi Cv lo C + lt1815 measure here out 4.99k 2.5v apd current monitor transient response measurement the transient response of the apd current monitor is a key performance characteristic. it is essentially a func- tion of the input step-signal levels, since the small signal bandwidth increases with the input signal. at greater than 10a, the LT3571 apd current mirror typically has several hundred nanoseconds response time. to measure such fast transient response, any capacitor at the apd and the mon pin should be removed. figure 4 shows a suggested transient response test setup. choose v l and v h , cor- responding to the input step current levels, respectively. at the mon pin, a wideband transimpedence ampli? er is implemented using the lt1815. operating in a shunt con? guration, the ampli? er buffers the mon output current and dramatically reduces the effective output impedence at the out node. note that there is an inversion and a dc offset present when this measurement technique is used. a regular oscilloscope probe can then be used to capture the fast transient response at the out node. apd bias voltage temperature compensation typically, the apd reverse bias voltage has a positive tem- perature coef? cient. the apd pin voltage can be adjusted with temperature via the ctrl pin. one simple solution is to form a resistor divider from the v ref pin to the ctrl pin, as shown in figure 5. by carefully choosing the resis- tor values, a temperature coef? cient can be applied to the apd reverse bias voltage. a more complicated and precise way to set the apd temperature coef? cient involves a transistor network as shown in the 5v to 50v apd bias power supply with temperature compensation. please consult with factory for this type applications. figure 4. transient response measurement set-up figure 5. setting temperature compensation applications information v ref ctrl r1 ntc 3571 f05 LT3571 r2
LT3571 12 3571fa typical applications c1 1f monin v ref r t shdn ctrl gnd sync v out fb v in sw LT3571 mon apd off on v in 5v r2 20.5k r4 49.9 45v r t 12.1k 1mhz r sense 20 3571 ta02a c4 0.1f c3 10nf r3 10k c5 10nf l: tdk vlf3010at C 100mr49 c1: tdk x7r c1608x7r1c105kt c2, c4: murata x7r grm188r72a104ka35 c3: avx x7r 06031c103k c5: murata x7r grm155r71h103k 50v c2 0.1f l1 10h r1 1m 5v to 45v apd bias power supply input power vs apd current apd current (ma) 0 input power (mw) 500 50 450 350 250 150 400 300 200 100 0 1.5 2 3571 ta02b 3 1 2.5 0.5 applications information figure 6. high frequency path load v out l1 switch node 3571 f06 v in high frequency circulating path setting apd current limit the LT3571 has a unique current loop to limit the apd current. choose the sense resistor r sense across v out and monin pins to set the apd current limit by using the following formula: r sense = 200mv 1.2 i apd (ma) + 0.3ma where i apd is the apd current limit. layout hints the high speed operation of the LT3571 demands careful attention to board layout. advertised performance will not be achieved with a careless layout. to prevent radiation and high frequency resonance problems, proper layout of the high frequency switching path is essential. keep the output switch (sw pin), diode and output capacitor as close together as possible. minimize the length and area of all traces connected to the switch pin, and always use a ground plane under the switching regulator to minimize interplane coupling. the high speed switching current path is shown in figure 6. the signal path, including the switch, output diode and output capacitor contains nanosecond rise and fall times and should be kept as short as possible.
LT3571 13 3571fa typical applications c1 1f c5 47nf monin v ref r t shdn ctrl gnd mon v out fb v in sw LT3571 sync apd v in 5v r2 13.7k r4 49.9 r3 10k r5 20k 69v, 2ma c5 10nf r sense 20 3571 ta03a c4 0.1f c3 10nf r t 33.2k 400khz l: tdk vlf4012at-220mr51 c1: tdk x7r c1608x7r1c105kt c2: murata x7r grm21ar72a224kac5l c3: avx x7r 06031c103k c4: murata x7r grm188r72a104ka35 c5: murata x7r grm155r7h103k c6: murata x7r gcm155r471c473k 74v c2 0.22f l1 22h r1 1m external control block 5v to 69v apd bias supply with soft-start adp current (ma) 0 input power (mw) 500 50 450 350 250 150 400 300 200 100 0 1 3571 ta03c 2 1.5 0.5 i apd = 1ma 2s/div 3571 ta03b 2mv/div apd bias ripple input power vs apd current
LT3571 14 3571fa typical applications c1 1f monin v ref r t shdn ctrl gnd sync v out fb v in sw LT3571 mon apd off on v in 5v r2 15k r4 49.9 50v r t 33.2k 400khz r sense 50 3571 ta04a c4 0.1f c3 10nf r3 10k c5 10nf q1 l1: tdk vlf4012at C 150mr63 c1: tdk x7r c1608x7r1c105kt c2: murata x7r grm21ar72a224kac5l c3: avx x7r 06031c103k c4: murata x7r grm188r72a104ka35 c5: murata x7r grm155r71h103k c6: murata x7r grm155r71a104ka01d 55v c2 0.22f l1 15h r1 1m r7 49.9k r5 30.1k r6 100k r9 20k c6 0.1f r8 36.5k q2 temperature compensation block q1, q2 = philips pemt1 5v to 50v apd bias power supply with temperature compensation apd current (ma) 0 input power (mw) 350 50 300 250 150 100 200 0 1 1.5 3571 ta04b 2 0.5 temperature (c) C50 v apd (v) 60 42 58 54 50 46 56 52 48 44 0 75 25 3571 ta04c 125 50 0 100 C25 input power vs apd current temperature response
LT3571 15 3571fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 3.00 p 0.10 (4 sides) recommended solder pad pitch and dimensions 1.45 p 0.05 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (weed-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 p 0.10 bottom viewexposed pad 1.45 p 0.10 (4-sides) 0.75 p 0.05 r = 0.115 typ 0.25 p 0.05 1 pin 1 notch r = 0.20 typ or 0.25 s 45 o chamfer 15 16 2 0.50 bsc 0.200 ref 2.10 p 0.05 3.50 p 0.05 0.70 p 0.05 0.00 C 0.05 (ud16) qfn 0904 0.25 p 0.05 0.50 bsc package outline package description ud package 16-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1691)
LT3571 16 3571fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2009 lt 0809 rev a ? printed in usa c1 1f monin v ref r t shdn ctrl gnd sync v out fb v in sw LT3571 mon apd off on v in 3.3v r2 18.2k 50v r t 26.1k 500khz l1: tdk vlf3010at-100mr49 c1: murata x7r grm21br71c105ka01b c2, c3: murata x7r grm188r72a104ka35 r sense 20 3571 ta05a r3 10k 55v c2 0.1f c3 0.1f l1 10h r1 1m related parts typical applications part number description comments lt1930/lt1930a 1a(i sw ), 1.2mhz/2.2mhz high ef? ciency step-up dc/dc converters v in : 2.6v to 16v, v out(max) = 34v, i q = 4.2ma/5.5ma, i sd <1a, thinsot? package lt3460/lt3460-1 0.3a (i sw ), 1.3mhz, 650khz high ef? ciency step-up dc/dc converters v in : 2.5v to 16v, v out(max) = 38v, i q = 2ma, i sd <1a, sc70 and thinsot packages lt3461/lt3461a 0.3a (i sw ), 1.3mhz/3mhz high ef? ciency step-up dc/dc converters with integrated schottky v in : 2.5v to 16v, v out(max) = 38v, i q = 2.8ma, i sd <1a, thinsot package lt3482 0.3a (i sw ), 650k/1.1mhz step-up dc/dc converter with apd current monitor v in : 2.5v to 16v, v out1(max) = 48v, v out2(max) = 90v, i q = 3.3ma, i sd <1a, 3mm 3mm qfn package thinsot is a trademark of linear technology corporation. input power vs apd current transient response on input signal falling edge (1ma to 10a) 3.3v to 50v apd bias power supply 50ns/div pwm gnd pwm 1v/div out 500mv/div 3571 ta05c t fd < 100ns i apd = 10a i apd = 1ma out gnd for transient response, please refer to figure 4 50ns/div pwm gnd pwm 1v/div out 500mv/div 3571 ta05d t rd < 100ns i apd = 1ma i apd = 10a out gnd transient response on input signal falling edge (10a to 1ma) apd current (ma) 0 input power (mw) 450 50 400 300 200 350 250 150 100 0 1 1.5 3571 ta05b 2 0.5

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